Fast Carrier and Phase Synchronization Units for Digital Receivers Based on Re-configurable Logic

摘要

Wireless communication systems operate within a wide variety of dynamic ranges, variable bandwidths and carrier frequencies. New high density re-programmable logic arrays are a suitable technology basis providing sufficient processing power required by software radio concepts employing multiple standards and transmission schemes. For high speed wireless data transmission and access networks as used in multimedia communication systems fast signal synchronization and acquisition schemes are required. Within this work, programmable carrier phase synchronization units have been designed as FPGA based subsystems to be used in various re-configurable digital receiver concepts. The performance and the available processing capacity was investigated and verified within a rapid prototyping design flow environment.