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A survey of FPGA-based accelerators for convolutional neural networks

机译:基于FPGA的卷积神经网络的加速器调查

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摘要

Deep convolutional neural networks (CNNs) have recently shown very high accuracy in a wide range of cognitive tasks, and due to this, they have received significant interest from the researchers. Given the high computational demands of CNNs, custom hardware accelerators are vital for boosting their performance. The high energy efficiency, computing capabilities and reconfigurability of FPGA make it a promising platform for hardware acceleration of CNNs. In this paper, we present a survey of techniques for implementing and optimizing CNN algorithms on FPGA. We organize the works in several categories to bring out their similarities and differences. This paper is expected to be useful for researchers in the area of artificial intelligence, hardware architecture and system design.
机译:深度卷积神经网络(CNNS)最近在广泛的认知任务中显示了非常高的准确性,并且由于这一点,他们已经获得了研究人员的重大兴趣。 鉴于CNN的高计算需求,定制硬件加速器对于提高其性能至关重要。 FPGA的高能量效率,计算能力和可重新配置性使其成为CNN的硬件加速的有希望的平台。 在本文中,我们展示了对FPGA上的实施和优化CNN算法的技术的调查。 我们在几个类别中组织了作品,以揭示他们的相似之处和差异。 这篇论文预计将对人工智能,硬件架构和系统设计领域的研究人员有用。

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