Design and implementation of high-speed token bucket based on FPGA

摘要

Token bucket is a common traffic control technique which is widely used in network equipment for traffic shaping and rate constraint. This paper proposes a realization method of high-speed token bucket, and provides theoretical analysis on selection of parameters, such as time granularity, augment granularity and bucket depth. Based on the live streaming data captured on real network, we simulate the rate constraint effects of our designed high-speed token bucket. We also implement the design in Altera FPGA. Resource usage, working frequency and power estimation are provided in the paper. Analysis and experiments show that the proposed high-speed token bucket can accurately constraint rate as well as achieve a high performance up to 1186.40Gbps.