首页> 外文会议>IPC Printed Circuits Expo, APEX and Designers Summit 2004 >Embedded Passives in High Layer Count High Reliability Printed Wiring Boards
【24h】

Embedded Passives in High Layer Count High Reliability Printed Wiring Boards

机译:高层数高可靠性印刷线路板中的嵌入式无源器件

获取原文
获取原文并翻译 | 示例

摘要

This paper will discuss the use of thin film buried resistors and thin core plane pairs in high layer count high reliabilityrnprinted wiring boards used in single and double sided surface mount assemblies. Very high thermal stress durability isrnrequired for assembly and component repair/replacement. The high density multilayer and sequential built designs of 14-26rnlayers use a combination of buried vias, blind vias, thin cores, several layers of buried resistors and thin core plane pairs tornmeet controlled impedance and circuit performance. The design of the resistors for BGA pull down terminations and for incircuitrnresistors contain various values and tolerances. Overall thermal performance of the board is critical to the productrnreliability requiring the buried resistors and thin core plane pairs to also survive extreme thermal exposure. Thermal stressrntesting, as required by the applicable standard, was extended to multiple times in order to determine product robustness forrnlaminate defects, plating integrity and inner plane connection durability. In addition, Current Induced Thermal CyclingrnTesting can be performed for comparative analysis. Special test coupons can be designed that duplicate the actual conditionsrnof the board and allow the buried resistor layer to be present in the microsection for evaluation during the requiredrninspections. As with conventional printed wiring technology, failures do occur, but typically only after extreme thermal stressrnor rework. Failure analysis was performed to identify the cause. Pictorial views of the component density, resistor designs,rnlayer stackup, and failure analysis activity are contained in the paper. This paper will show that embedded passive technologyrncan be implemented with success for high density, high layer count and high reliability printed wiring boards.
机译:本文将讨论在单面和双面表面贴装组件中使用的薄膜埋入电阻器和薄芯平面对在高层数高可靠性印刷线路板中的使用。对于组装和组件维修/更换,需要非常高的热应力耐久性。 14-26层的高密度多层和顺序构建设计结合使用掩埋过孔,盲孔,薄芯,几层掩埋电阻器和薄芯平面对,以实现可控的阻抗和电路性能。 BGA下拉终端和在线电阻器的电阻设计包含各种值和公差。电路板的整体热性能对于产品可靠性至关重要,要求掩埋电阻和薄铁芯平面对也要承受极端的热暴露。根据适用标准的要求,将热应力测试扩展了多次,以便确定层压板缺陷的产品坚固性,电镀完整性和内平面连接耐久性。另外,可以进行电流感应热循环测试以进行比较分析。可以设计特殊的测试试样,以复制电路板的实际条件,并允许在显微切片中存在埋入的电阻器层,以便在要求的检查期间进行评估。与常规印刷布线技术一样,确实会发生故障,但通常仅在极端的热应力或返工之后才会发生。进行故障分析以找出原因。本文包含组件密度,电阻器设计,多层堆叠以及故障分析活动的图形视图。本文将说明嵌入式无源技术可以成功地用于高密度,高层数和高可靠性的印刷线路板。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号