Lethargic Cache: A Low Leakage Direct Mapped Cache

摘要

This paper proposes special level-1 cache scheme that greatly decreases the growing leakage power proliferation in short channel cache memories based on gated supply voltage mechanism (gated-V{sub}(dd), a commonly-known circuit technique used to control power supply to cache cells. The proposed scheme slashes 26% of the total leakage dissipated in a conventional baseline at the cost of marginal performance degradation and silicon die area.