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首页> 外文期刊>Progress in Artificial Intelligence >An Improved All-Digital Background Calibration Technique for Channel Mismatches in High Speed Time-Interleaved Analog-to-Digital Converters
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An Improved All-Digital Background Calibration Technique for Channel Mismatches in High Speed Time-Interleaved Analog-to-Digital Converters

机译:一种改进的全数字背景校准技术,用于高速时间交错模数转换器中的信道错配

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摘要

The time-interleaved analog-to-digital converters (TIADCs), performance is seriously affected by channel mismatches, especially for the applications in the next-generation communication systems. This work presents an improved all-digital background calibration technique for TIADCs by combining the Hadamard transform for calibrating gain and timing mismatches and averaging for offset mismatch cancellation. The numerical simulation results show that the proposed calibration technique completely suppresses the spurious images due to the channel mismatches at the output spectrum, which increases the spurious-free dynamic range (SFDR) and signal-to-noise and distortion ratio (SNDR) by 74 dB and 43.7 dB, respectively. Furthermore, the hardware co-simulation on the field programmable gate array (FPGA) platform is performed to confirm the effectiveness of the proposed calibration technique. The simulation and experimental results clarify the improvement of the proposed calibration technique in the TIADC's performance.
机译:时间交错的模数转换器(TIADC),性能受到信道不匹配的严重影响,特别是对于下一代通信系统中的应用。通过组合Hadamard变换来校准增益和定时失配,提出了一种改进的TIADC的改进的全数字背景校准技术,并为偏移错配消除进行平均。数值模拟结果表明,所提出的校准技术由于输出频谱处的信道错配而完全抑制了虚假图像,这增加了无杂散的动态范围(SFDR)和信号 - 噪声和失真比​​(SNDR)到74分别为DB和43.7 dB。此外,执行现场可编程门阵列(FPGA)平台上的硬件共模,以确认所提出的校准技术的有效性。模拟和实验结果阐明了TIADC性能中提出校准技术的提高。

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