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首页> 外文期刊>IEEE Journal of Solid-State Circuits >Effects of substrate resistances on LNA performance and a bondpadstructure for reducing the effects in a silicon bipolar technology
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Effects of substrate resistances on LNA performance and a bondpadstructure for reducing the effects in a silicon bipolar technology

机译:基板电阻对LNA性能和键合焊盘结构的影响,以减少硅双极技术中的影响

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The effects of substrate resistances on the performance of 5.8-GHznlow-noise amplifiers (LNAs) have been evaluated through a combination ofnexperimental and simulation studies. The substrate resistive network fornthe LNA has been constructed by fabricating and measuring a testnstructure. The substrate resistances can be significantly affected bynthe die area and thickness, which raises a serious concern for on-waferntesting and optimization of circuits using the test results. Thensubstrate resistances reduce the simulated gain by more than 10 dB andnincrease the noise figure by 2.7 dB. The simulation study has shown thatnthe dominant substrate resistances are those associated with thenbondpads. To reduce the effects of the substrate resistances, anground-shielded bondpad structure, which consists of a Metal 2 pad andnan n+ plug grounded shield separated by a composite oxidenlayer, has been developed. It reduces the resistance to ground to almostnzero by conducting the signal away from the substrate to ground throughnthe low-resistivity n+ plug layer. The pad structure innaddition improves the interpad isolation by as much as 35 dB. However,nto harness this isolation improvement, the inductance between the IC andnPC board ground should be made small by using a low ground inductancenpackage. Using this ground-shielded bondpad, the measured gain and noisenfigure of a 4.5-GHz tuned amplifier were improved by 10 and 2 dB,nrespectively, over the same circuit implemented using the conventionalnbondpad
机译:基板电阻对5.8 GHz低噪声放大器(LNA)性能的影响已通过非实验和仿真研究相结合进行了评估。 LNA的基板电阻网络是通过制造和测量测试结构来构造的。芯片的面积和厚度会严重影响衬底的电阻,这引起了晶圆上测试和使用测试结果优化电路的严重关注。然后,基片电阻会使模拟增益降低10 dB以上,并使噪声系数增加2.7 dB。仿真研究表明,主要的衬底电阻是与键合焊盘相关的电阻。为了降低衬底电阻的影响,已经开发了一种接地屏蔽的焊盘结构,该结构由金属2焊盘和被复合氧化物层隔开的Nan +插头接地屏蔽层组成。通过通过低电阻率n +插塞层将信号从基板传到地面,可将接地电阻降至几乎为零。焊盘结构的附加功能可将焊盘间的隔离度提高多达35 dB。但是,为了充分利用这种隔离性能,应使用低接地电感的封装将IC和nPC板接地之间的电感减小。使用此接地屏蔽焊盘,与使用常规nbondpad实现的相同电路相比,将4.5 GHz调谐放大器的测量增益和噪声系数分别提高了10 dB和2 dB。

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