基于混合蛙跳算法的时序电路测试生成

摘要

This paper develops a new approach for the test pattern generation in a sequential circuit. After analysis of the structural of the sequential circuits, the expression of Shuffled Frog Leaping Algorithm is established and the discrete SFLA model is designed for the test generation. The best test vector set is gained rapidly by the competition and cooperation in the frog group. Finally, the experimental results for the benchmark circuits prove the algorithm can get higher fault coverage and smaller test set when it is compared with other algorithms.%阐述了将混合蛙跳算法应用在时序电路自动测试生成的实现方法和结果;根据时序电路自身的结构特点,构造了测试生成的混合蛙跳表达方式,设计了自动测试生成离散混合蛙跳模型,通过群体中青蛙间的合作和竞争产生的群智能指导快速优化收敛;最后,根据国际标准时序电路进行了验证试验;结果表明,与同类算法相比,该算法获得了较小的测试集和较高的故障覆盖率.