具有L型源极场板的双槽绝缘体上硅高压器件新结构∗

摘要

To improve the breakdown voltage and reduce the specific on-resistance of a small size silicon on insulator (SOI) device, a dual-trench SOI high voltage device with an L-shaped source field plate is proposed. The device has the features as follows: first, a trench gate is adopted. The trench gate widens the current conduction area and makes the current conduction path shorter, thus lowering the specific on-resistance. Second, a SiO2 dielectric layer is introduced into the drift region. This dielectric layer can hold a high electric field, which makes the breakdown voltage greatly increased. Third, an L-shaped source field plate is introduced. This field plate modulates the electric field in the drift region, so increases the optimized doping concentration of the drift region significantly and reduces the specific on-resistance. The results from the two-dimensional semiconductor simulator show that as compared with a conventional SOI device at the same cell pitch, the breakdown voltage is increased by 151%, and the specific on-resistance is reduced by 20%. The specific on-resistance is reduced by 80%at the same breakdown voltage. Compared with a dual-trench SOI device with the same cell pitch, the proposed device maintains the same high breakdown voltage as the dual-trench SOI device, and at the same time, the specific on-resistance is decreased by 26%.%为了提高小尺寸绝缘体上硅(SOI)器件的击穿电压，同时降低器件比导通电阻，提出了一种具有L型源极场板的双槽SOI高压器件新结构。该结构具有如下特征：首先，采用了槽栅结构，使电流纵向传导面积加宽，降低了器件的比导通电阻；其次，在漂移区引入了SiO2槽型介质层，该介质层的高电场使器件的击穿电压显著提高；第三，在槽型介质层中引入了L型源极场板，该场板调制了漂移区电场，使优化漂移区掺杂浓度大幅增加，降低了器件的比导通电阻。二维数值仿真结果表明：与传统SOI结构相比，在相同器件尺寸时，新结构的击穿电压提高了151%，比导通电阻降低了20%；在相同击穿电压时，比导通电阻降低了80%。与相同器件尺寸的双槽SOI结构相比，新结构保持了双槽SOI结构的高击穿电压特性，同时，比导通电阻降低了26%。