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Programmable analog techniques for precision analog circuits, low-power signal processing and on-chip learning.

机译:用于精密模拟电路,低功率信号处理和片上学习的可编程模拟技术。

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摘要

The transistor is one of the key components that has made possible the plethora of electronic gadgets that one finds in use today. Investigating the possibilities of providing an additional degree of design freedom to this fundamental element is the subject of this research. This is achieved using a floating-gate transistor that provides programmability in circuits and thereby positively impacts a wide range of applications from traditional analog circuits to systems that learn on-chip.; Using a programmable analog framework, precision analog circuits have been developed that are compact and power efficient. Floating-gate transistors form an inherent part of the circuits of interest. Candidate circuits demonstrated include programmable references and low-offset amplifiers. Lack of programmability in analog circuits has been the biggest stumbling block in implementing key signal processing operations such as multiplication and addition in an area and power efficient manner in the analog domain. Using floating-gate transistors, an analog current-mode multiply-accumulate unit has been developed. Experimental results show significant power savings when compared with digital implementations.; Programmable analog sets the stage for on-chip learning and adaptation as well. An analog architecture has been presented that implements an adaptive filter with on-chip learning of the necessary weights such that the error between the system output and a target signal is minimized. The fundamental building block of this system is a floating-gate synapse that modifies the charge stored on its floating-gate using a least-mean-square learning algorithm. A simulation model for the floating-gate synapse has also been developed in order to help design large-scale adaptive filters. In summary, this research involves developing techniques for improving analog circuit performance and in developing power-efficient circuits for signal processing and on-chip learning.
机译:晶体管是使当今人们使用的大量电子产品成为可能的关键组件之一。研究为该基本元素提供更多设计自由度的可能性是本研究的主题。这是通过使用浮栅晶体管来实现的,该浮栅晶体管可提供电路的可编程性,从而对从传统模拟电路到片上学习系统的广泛应用产生积极影响。使用可编程模拟框架,已经开发出了紧凑且节能的精密模拟电路。浮栅晶体管构成目标电路的固有部分。演示的候选电路包括可编程基准和低失调放大器。模拟电路缺乏可编程性一直是实现关键信号处理操作的最大障碍,例如在模拟域中以面积和低功耗方式实现乘法和加法。使用浮栅晶体管,已开发出模拟电流模式乘法累加单元。实验结果表明,与数字实现方案相比,可节省大量功率。可编程模拟也为片上学习和适应奠定了基础。已经提出了一种模拟架构,该架构通过对必要权重的片上学习来实现自适应滤波器,从而使系统输出和目标信号之间的误差最小。该系统的基本构件是浮栅突触,它使用最小均方学习算法修改存储在其浮栅上的电荷。为了帮助设计大规模自适应滤波器,还开发了用于浮栅突触的仿真模型。总而言之,这项研究涉及开发用于改善模拟电路性能的技术以及开发用于信号处理和片上学习的高能效电路。

著录项

  • 作者

    Srinivasan, Venkatesh.;

  • 作者单位

    Georgia Institute of Technology.;

  • 授予单位 Georgia Institute of Technology.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2006
  • 页码 182 p.
  • 总页数 182
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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