application specific integrated circuits; direct broadcasting by satellite; field programmable gate arrays; receivers; signal processing; CMOS; ETSI DVB-S2 digital satellite communication; FPGA prototyping; VLSI resource estimation; detailed DVB-S2 receiver implementation; digital receiver; digital receivers; internal architecture; preliminary ASIC resource estimation; signal processing; synchronization algorithms; verification phase; Decoding; Digital video broadcasting; Field programmable gate arrays; Mathematical model; Parity check codes; Receivers; Signal processing algorithms;
机译:符合IEEE802.15.4g的MR-FSK收发器,适用于智能计量实用程序应用:FPGA实现和ASIC资源估计
机译:FPGA的同步相量估计的增强内插DFT:PMU原型的理论,实现和验证
机译:从FPGA到ASIC:从原型到量产
机译:DVB-S2接收机的详细实现:FPGA原型设计和ASIC初步资源估算
机译:使用多个FPGA进行大型ASIC逻辑仿真的快速原型架构和方法。
机译:高效的FPGA实现双频率GNSS接收机具有稳健的频率互动
机译:FPGA与基数-8可扩展蒙哥马利模块化倍增器的ASIC实现。(DEPT.E)FPGA与ASIC实现的基数-8可扩展蒙格组合模块化倍增仪(DEPT.E)