Application of Shadow Moire Technique to Board Level Manufacturing Technologies

摘要

Shadow moire technique is already well-established as a technique for evaluating component warpage. Improvements to the metrology have increased its usefulness for evaluating various board-level manufacturing technologies. This experiment used the technique for two key board-level applications: i. Bare printed circuit board (PCB) warpage during the lead-free reflow: PCB warpage is becoming more significant due to the higher temperature required for lead-free reflow. This work used shadow moire dynamic reflow simulation to explore the effect of three variables-board thickness, glass transition temperature, and vendors - on board warpage. The test data showed clearly that board thickness is the most significant variable. ii. Assembled board warpage under mechanical preload from thermal solutions and under thermal cycling: One of the heatsink design approaches for desktop motherboards is to apply a preload to the CPU area of a motherboard in order to ensure thermal performance. This approach requires a more careful control of the preload. Board warpage is significant and is identified as a good metrology for preload estimation. Motherboards under three different preloads in the CPU area were measured: Both the global board warpage and the local board warpage around the CPU area were measured for preload correlations. The measured board warpage was correlated to the board preload successfully. In addition to these two issues, other examples are discussed briefly to demonstrate the capability of the board level shadow moire technique. The work proved that the metrology has become an indispensable thermal-mechanical analysis for manufacturing technology evolutions.