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A CMOS Dual-RC frequency reference with ±250ppm inaccuracy from −45°C to 85°C

机译:CMOS双RC频率基准,在−45°C至85°C范围内具有±250ppm的误差

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To comply with wired communication standards such as USB, SATA and PCI/PCI-E, systems-on-chip require frequency references with better than 300ppm accuracy. LC-based references achieve 100ppm accuracy [1], but suffer from high power consumption (~20mW). Thermal diffusivity (TD) references require less power (~2mW), at the expense of less accuracy (1000ppm) [2]. RC-based references offer the lowest power consumption, but their accuracy is typically limited to ~0.1% [3]. In RC relaxation oscillators, comparator offset and delay are the major sources of inaccuracy [4,5]. References based on frequency-locked loops (FLLs) circumvent these by locking an oscillator's frequency to the time-constant of an RC filter, but their accuracy is then limited by the nonlinear temperature dependency of on-chip resistors [3,6].
机译:为了符合USB,SATA和PCI / PCI-E等有线通信标准,片上系统要求频率基准具有优于300ppm的精度。基于LC的基准达到100ppm的精度[1],但功耗高(〜20mW)。热扩散率(TD)基准需要较少的功率(〜2mW),以较低的精度(1000ppm)为代价[2]。基于RC的基准提供了最低的功耗,但其精度通常限于〜0.1 \%[3]。在RC弛豫振荡器中,比较器的失调和延迟是误差的主要来源[4,5]。基于锁频环(FLL)的参考文献通过将振荡器的频率锁定在RC滤波器的时间常数上来规避这些问题,但是其精度受到片上电阻器非线性温度依赖性的限制[3,6]。

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