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Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems

机译:黑暗的硅感知硬件 - 软件功能合作设计用于异构多​​核系统

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ARM's big. LITTLE architecture coupled with Heterogeneous Multi-Processing (HMP) has enabled energy-efficient solutions in the dark silicon era. System-level techniques activate nonadjacent cores to eliminate chip thermal hotspot. However, it unexpectedly increases communication delay due to longer distance in network architectures, and in turn degrades application performance and system energy efficiency. In this paper, we present a novel hierarchical hardware-software collaborated approach to address the performance/temperature conflict in dark silicon many-core systems. Optimizations on interprocessor communication, application performance, chip temperature and energy consumption are well isolated and addressed in different phases. Evaluation results show that on average 22.57% reduction of communication latency, 23.04% improvement on energy efficiency and 6.11°C reduction of chip peak temperature are achieved compared with state-of-the-art techniques.
机译:手臂大。与异构多处理(HMP)相结合的小型架构在黑暗硅时代启用了节能解决方案。系统级技术激活NonAdjouth核心以消除芯片热热点。但是,由于网络架构中的距离较长,因此它意外地提高了通信延迟,并且反过来降低了应用性能和系统能源效率。在本文中,我们提出了一种新的等级硬件 - 软件协作方法,以解决暗硅许多核心系统中的性能/温度冲突。在不同阶段的孤立和寻址的孤立性,应用性能,芯片温度和能量消耗的优化。评价结果表明,平均减少通信延迟的22.57%,与最先进的技术相比,达到了高能量效率和6.11°C的芯片峰值温度的提高23.04%。

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