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Pulsed bias having high pulse frequency for filling gaps with dielectric material

机译:具有高脉冲频率的脉冲偏压,用于用介电材料填充间隙

摘要

During bottom filling of high aspect ratio gaps and trenches in an integrated circuit substrate using HDP-CVD, a pulsed HF bias is applied to the substrate. In some embodiments, pulsed HF bias is applied to the substrate during etching operations. The pulsed bias typically has a pulse frequency in a range of about from 500 Hz to 20 kHz and a duty cycle in a range of about from 0.1 to 0.95.
机译:在使用HDP-CVD在集成电路基板中高纵横比的间隙和沟槽的底部填充期间,将脉冲HF偏压施加到基板上。在一些实施例中,在蚀刻操作期间将脉冲HF偏压施加到基板。脉冲偏压通常具有在约500Hz至20kHz范围内的脉冲频率和在约0.1至0.95范围内的占空比。

著录项

  • 公开/公告号US7514375B1

    专利类型

  • 公开/公告日2009-04-07

    原文格式PDF

  • 申请/专利权人 SUNIL SHANKER;CHI-I LANG;

    申请/专利号US20060500799

  • 发明设计人 SUNIL SHANKER;CHI-I LANG;

    申请日2006-08-08

  • 分类号H01L21/31;H01L21/469;

  • 国家 US

  • 入库时间 2022-08-21 19:29:16

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