首页> 外国专利> Multiple-valued logic circuit using dual gate Single Electron Transistor with MOS Transistor and multiple logic system using the same

Multiple-valued logic circuit using dual gate Single Electron Transistor with MOS Transistor and multiple logic system using the same

机译:使用具有MOS晶体管的双栅极单电子晶体管的多值逻辑电路以及使用该电路的多逻辑系统

摘要

A plurality of constant current sources (VDD) for applying a constant current; The input voltage of the same potential level is applied to each gate, the side gate input voltage of the different potential level is applied to each side gate, the current phase of the constant current source is shifted at the output end, and the drain is connected to the constant current source side A plurality of dual-gate single-electron transistors each connected to a voltage source of a different potential level representative of the lower logic value of the multiple-valued logic circuit; And a plurality of constant-current sources (VDD) and a plurality of dual-gate single-electron transistors, each of the plurality of constant-current sources being connected in series to each other, wherein a current from each of the plurality of constant- A MOS transistor for transmitting to each transistor; The present invention provides a multi-value logic circuit using a dual-gate single-electron transistor and a MOS transistor, wherein a plurality of delta-litter circuits are formed.
机译:多个恒定电流源(VDD),用于施加恒定电流。将相同电位电平的输入电压施加到每个栅极,将不同电位电平的侧栅极输入电压施加到每个侧栅极,恒流源的电流相位在输出端发生偏移,并且漏极连接到恒流源侧。多个双栅单电子晶体管,每个双栅单极晶体管连接到代表多值逻辑电路的较低逻辑值的不同电势电平的电压源。以及多个恒流源(VDD)和多个双栅单电子晶体管,所述多个恒流源中的每个彼此串联连接,其中,来自所述多个恒流中的每个的电流-用于传输到每个晶体管的MOS晶体管;本发明提供了一种使用双栅极单电子晶体管和MOS晶体管的多值逻辑电路,其中形成了多个Δ-Δlitter电路。

著录项

  • 公开/公告号KR101668486B1

    专利类型

  • 公开/公告日2016-10-24

    原文格式PDF

  • 申请/专利权人 충북대학교 산학협력단;

    申请/专利号KR20100011407

  • 发明设计人 계훈우;송복남;최중범;

    申请日2010-02-08

  • 分类号H03K19/20;H03K19;H03K19/094;

  • 国家 KR

  • 入库时间 2022-08-21 14:11:47

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