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Design and Implementation of a TMS320C25-Based Hybrid Digital Phase-Locked Loop --An Application to Transponder Receiver Breadboard

机译：基于Tms320C25的混合数字锁相环的设计与实现 - 一种应用于转发器接收器面板的应用

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摘要

The experimental study of a Phase-Locked Loop (PLL) with a digital loop filter is presented in this paper.

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作者
Yeh, Hen-Geul; Nguyen, Tien M.;
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年度 1994
页码 1-26
总页数 26
原文格式 PDF
正文语种 eng
中图分类工业技术;
关键词
BREADBOARD MODELS; DIGITAL FILTERS; DIGITAL SYSTEMS; PHASE LOCKED SYSTEMS; RECEIVERS; SIGNAL ANALYZERS; SIGNAL PROCESSING; TRANSPONDERS; Phase-locked loop pll digital loop filter digital signal processor;

机译：面包板模型;数字滤波器;数字系统;相位锁定系统;测量;信号分析器;信号处理;转发器;锁相环pll数字环路滤波器数字信号处理器;

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8. Design and implementation of a hybrid digital phase-locked loop with a TMS320C25: An application to a transponder receiver breadboard [R] . Yeh, H.-G., Nguyen, T. M. 1994

机译：使用Tms320C25设计和实现混合数字锁相环：应用于发送应答器接收器面包板

Design and Implementation of a TMS320C25-Based Hybrid Digital Phase-Locked Loop --An Application to Transponder Receiver Breadboard

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