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Few-Layer MoS2 p-Type Devices Enabled by Selective Doping Using Low Energy Phosphorus Implantation

机译:通过使用低能磷注入进行选择性掺杂实现了几层MoS2 p型器件

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P-type doping of MoS2 has proved to be a significant bottleneck in the realization of fundamental devices such as p-n junction diodes and p-type transistors due to its intrinsic n-type behavior. We report a CMOS compatible, controllable and area selective phosphorus plasma immersion ion implantation (PIII) process for p-type doping of MoS2. Physical characterization using SIMS, AFM, XRD and Raman techniques was used to identify process conditions with reduced lattice defects as well as low surface damage and etching, 4X lower than previous plasma based doping reports for MoS2. A wide range of nondegenerate to degenerate p-type doping is demonstrated in MoS2 field effect transistors exhibiting dominant hole transport. Nearly ideal and air stable, lateral homogeneous p-n junction diodes with a gate-tunable rectification ratio as high as 2 X 10(4) are demonstrated using area selective doping. Comparison of XPS data from unimplanted and implanted MoS2 layers shows a shift of 0.67 eV toward lower binding energies for Mo and S peaks indicating p-type doping. First-principles calculations using density functional theory techniques confirm p-type doping due to charge transfer originating from substitutional as well as physisorbed phosphorus in top few layers of MoS2. Pre-existing sulfur vacancies are shown to enhance the doping level significantly.
机译:由于其固有的n型行为,MoS2的p型掺杂已被证明是实现基本器件(例如p-n结二极管和p型晶体管)的重要瓶颈。我们报告了MoS2的p型掺杂的CMOS兼容,可控和区域选择性磷等离子体浸没离子注入(PIII)工艺。使用SIMS,AFM,XRD和拉曼技术进行物理表征可识别晶格缺陷减少,表面损伤和蚀刻率低(比以前基于MoS2的等离子体掺杂报告低4倍)的工艺条件。在展现主要空穴传输的MoS2场效应晶体管中,已证明了从简并简到简简的p型掺杂的范围很广。使用区域选择性掺杂技术演示了接近理想且空气稳定的横向均质p-n结二极管,其栅极可调整流比高达2 X 10(4)。比较来自未植入和已植入MoS2层的XPS数据,发现Mo和S峰的结合能低0.67 eV,表明p型掺杂。使用密度泛函理论技术进行的第一性原理计算证实了p型掺杂,这是由于源于MoS2顶层几层中的取代以及物理吸附的磷引起的电荷转移。预先存在的硫空位可显着提高掺杂水平。

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