Design and Implementation of Field Programmable Gate Array based Digital Pulse Width Modulator for Synchronous Buck Converter

摘要

Pulse width modulation (PWM) has been widely used in power converter control. This paper starts with state of the art of counter-comparator architectures of the Digital Pulse Width Modulator (DPWM) and targets at digital control of switching of DC-DC Converters. The DPWMs reported are suitable for the ASIC and FPGA based implementations for single phase and single output DC-DC converters. The contribution of this paper is the development of a DPWM for Synchronous buck converter involving two MOSFET switches. The proposed DPWM is counter-comparator based architecture implemented on FPGA, which generates the complementary signals with fixed dead time suitable for synchronous buck converter. The experimental results are also presented for functional verification of the proposed DPWM with the prototype synchronous buck converter.