Simulation of 2 Bit by 2 Bit Binary Multiplier Using Magnetic Tunnel Junction Device

摘要

Magnetic tunnel junction (MTJ) devices are based on highly flourishing and developing field of "Spintronics." These devices are considered as perfect replacement for transistors in memory devices. Not only this, MTJ devices have been also used for computation of logic functions in many recent research works. Use of MTJ in designing of logic devices has many advantages over conventional units (like CMOS, BJT). In the past, many logic computational circuits have been designed using both MTJ and CMOS. However, using only MTJ as the basic unit for processing and storing of input/output is more advantageous and efficient. To demonstrate this, we designed a 2-bit by 2-bit binary multiplier without using CMOS. We implemented the macro-model of MTJ in VERILOG-A programming language and performed SPICE simulations to capture the electrical characteristics of an MTJ. We find that use of only MTJs can reduce the problem of scalability to large extent as compared to CMOS based devices.