Architecture, design, and test of continuous-time tunableintermediate-frequency bandpass delta-sigma modulators

摘要

This paper examines the architecture, design, and test ofncontinuous-time tunable intermediate-frequency (IF) fourth-ordernbandpass delta-sigma (BP ΔΣ) modulators. Bandpass modulatorsnsampling at high IFs (~100 MHz) allow direct sampling of the RFnsignal-reducing analog hardware and make it easier to realize completelynsoftware programmable receivers. This paper presents circuit design ofnand test results from continuous-time fourth-order BP ΔΣnmodulators fabricated in AlInAs/GaInAs heterojunction bipolar technologynwith a peak unity current gain cutoff frequency (fT) of 80nGHz and a maximum frequency of oscillation (fMAX) of aboutn130 GHz. Operating from ±5-V power supplies, a fabricated 180-MHznIF fourth-order ΔΣ modulator sampling at 4 GS/s demonstratesnstable behavior and achieves 75.8 dB ofnsignal-to-(noise+distortion)-ratio (SNDR) over a 1-MHz bandwidth.nNarrowband performance (~1 MHz) performance of these modulators isnlimited by thermal/device noise while broadband performance (~60 MHz),nis limited by quantization noise. The high sampling frequency (4 GS/s)nin this converter is dictated by broadband (60 MHz) performancenrequirements