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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A 0.6-V 82-dB Delta-Sigma Audio ADC Using Switched-RC Integrators
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A 0.6-V 82-dB Delta-Sigma Audio ADC Using Switched-RC Integrators

机译:使用开关RC积分器的0.6V 82dBΔ-Σ音频ADC

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摘要

A 0.6-V 2-2 cascaded audio delta-sigma ADC is described. It uses a resistor-based sampling technique which achieves high linearity and low-voltage operation without subjecting the devices to large terminal voltages. A low-distortion feed-forward topology combined with nonlinear local feedback results in enhanced linearity by reducing the sensitivity to opamp distortion, and allows increased input amplitude, resulting in higher SNDR. The modulator achieves 82-dB dynamic range and 81-dB peak SNDR in the A-weighted audio signal bandwidth with an OSR of 64. The total power consumption of the modulator is 1 mW from a 0.6-V supply. The prototype occupies 2.9 mm{sup}2 using a 0.35-μm CMOS technology.
机译:描述了一种0.6V 2-2级联音频delta-sigma ADC。它使用基于电阻的采样技术,可实现高线性度和低压操作,而不会使器件承受较大的端电压。低失真前馈拓扑与非线性本地反馈相结合,可通过降低对运算放大器失真的敏感度来提高线性度,并允许增加输入幅度,从而提高SNDR。该调制器在A加权音频信号带宽中达到82dB的动态范围和81dB的峰值SNDR,OSR为64。0.6V电源的调制器总功耗为1mW。采用0.35-μmCMOS技术的原型占地2.9 mm {sup} 2。

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