We discuss circuit parameters that limit the precision of basic dynamic current-memory cells. In addition to analyzing current-copying errors caused by the finite output conductances of the current sources and by the clock-feedthrough (CFT) of the feedback switches, we analyze the noise performance of the basic memory cell. To reduce CFT and noise, we propose a novel circuit based on Miller capacitance-enhancement. Measurement results of memory cells integrated in a 1-/spl mu/m CMOS process confirm the theoretical findings; with our CFT and noise reduction technique based on Miller enhanced capacitance and dummy switches, we achieve a dynamic range of 11 b at clock frequencies greater than 100 kHz.
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机译:我们讨论了限制基本动态电流存储单元精度的电路参数。除了分析由电流源的有限输出电导和反馈开关的时钟馈通(CFT)引起的复制电流错误之外,我们还分析了基本存储单元的噪声性能。为了降低CFT和噪声,我们提出了一种基于Miller电容增强的新型电路。以1 / splμm/ m CMOS工艺集成的存储单元的测量结果证实了理论发现;利用我们的基于米勒增强型电容和虚拟开关的CFT和降噪技术,我们可以在时钟频率大于100 kHz时实现11b的动态范围。
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