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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A CMOS analog multi-sinusoidal phase-locked-loop
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A CMOS analog multi-sinusoidal phase-locked-loop

机译:CMOS模拟多正弦锁相环

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摘要

An analog CMOS IC is described that is capable of tracking and isolating the sinusoidal components of a two-sinusoidal input signal, though the algorithm can be easily generalized to deal with a larger number of input sinusoids. It is based on adapting the parameters of an IIR filter; the filter topology takes on the form of resonators in a feedback loop, and the adaptive algorithm moves these resonator frequencies until they are equal to the input frequencies, at which point, the isolated sinusoids are available at the resonator outputs. The adaptive filter features a minimal hardware complexity (to track l sinusoids, exactly l second order resonators are needed), and also gets around the convergence problems normally associated with IIR adaptive filters. This filter was implemented in the continuous-time domain using a G/sub m/-C architecture, with the G/sub m/ being used to tune the resonator frequency. The chip was fabricated using a 2-/spl mu/m digital CMOS process, with poly resistors, and metal1-metal2 capacitors. It was tested and shown to be fully functional, with a useful tracking range of /spl ap/500-800 kHz around the initial frequency of each resonator.
机译:描述了一种能够跟踪和隔离两个正弦输入信号的正弦分量的模拟CMOS IC,尽管该算法可以很容易地推广到处理大量输入正弦的情况。它基于调整IIR滤波器的参数;滤波器拓扑在反馈回路中采用谐振器的形式,自适应算法移动这些谐振器频率,直到它们等于输入频率为止,此时,在谐振器输出端可以使用隔离的正弦波。自适应滤波器具有最低的硬件复杂度(要跟踪1个正弦波,正好需要1个二阶谐振器),并且还可以解决通常与IIR自适应滤波器相关的收敛问题。该滤波器是使用G / sub m / -C架构在连续时域中实现的,其中G / sub m /用于调谐谐振器频率。该芯片是使用2- / spl mu / m数字CMOS工艺制造的,带有多晶硅电阻器和metal1-metal2电容器。它经过测试并显示为功能齐全,在每个谐振器的初始频率附近具有有用的跟踪范围/ spl ap / 500-800 kHz。

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