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A 3D analytical modeling of tri-gate tunneling field-effect transistors

机译:三栅隧穿场效应晶体管的3D分析建模

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In this paper, a three-dimensional (3D) analytical solution of the electrostatic potential is derived for the tri-gate tunneling field-effect transistors (TG TFETs) based on the perimeter-weighted-sum approach. The model is derived by separating the device into a symmetric and an asymmetric double-gate (DG) TFETs and then solving the 2D Poisson's equation for these structures. The subthreshold tunneling current expression is extracted by numerical integrating the band-to-band tunneling generation rate over the volume of the device. It is shown that the potential distributions, the electric field profile, and the tunneling current predicted by the analytical model are in close agreement with the 3D device simulation results without the need of fitting parameters. Additionally, the dependence of the tunneling current on the device parameters in terms of the gate oxide thickness, gate dielectric constant, channel length, and applied drain bias is investigated and also demonstrated its agreement with the device simulations.
机译:本文基于周长加权和方法,导出了三栅极隧穿场效应晶体管(TG TFET)的静电势的三维(3D)分析解决方案。通过将器件分为对称和非对称双栅极(DG)TFET,然后针对这些结构求解二维Poisson方程,可以得出模型。通过对器件体积上的带间隧穿发生率进行数值积分,提取亚阈值隧穿电流表达式。结果表明,分析模型预测的电势分布,电场分布和隧穿电流与3D器件仿真结果非常吻合,而无需拟合参数。此外,研究了隧穿电流对器件参数的依赖性,包括栅氧化层厚度,栅介电常数,沟道长度和施加的漏极偏压,并证明了其与器件仿真的一致性。

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