A pulse-based, parallel-element macromodel for ferroelectriccapacitors

Sheikholeslami A.; Gulak P.G.; Takauchi H.; Tamura H.; Yoshioka H.; Tamura T.

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A pulse-based, parallel-element macromodel for ferroelectriccapacitors

机译：基于脉冲的铁电电容器并联元素宏模型

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A pulse-based behavioral model is proposed and implemented innHSPICE. Hysteresis-loop and pulse measurement results are used tonextract the model parameters. The model accurately predicts the bitlinenvoltage of a ferroelectric memory testchip

机译：在nHSPICE中提出并实现了基于脉冲的行为模型。磁滞回线和脉冲测量结果用于色调提取模型参数。该模型可准确预测铁电存储器测试芯片的位线电压

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来源
《IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control》 |2000年第4期|p.784-791|共8页
作者
Sheikholeslami A.; Gulak P.G.; Takauchi H.; Tamura H.; Yoshioka H.; Tamura T.;
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正文语种 eng
中图分类声学工程;计量学;
关键词
SPICE; dielectric hysteresis; ferroelectric capacitors; ferroelectric storage; modelling; HSPICE; bitline voltage; ferroelectric memory; hysteresis-loop; parallel-element macromodel; pulse-based behavioral model;

机译：SPICE;介电滞后;铁电电容器;铁电存储;建模;HSPICE;位线电压;铁电存储器;磁滞回线;并联单元宏模型;基于脉冲的行为模型;

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1. A pulse-based, parallel-element macromodel for ferroelectric capacitors [J] . Sheikholeslami A., Gulak P.G. IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control . 2000,第4期

机译：基于脉冲的铁电电容器并联元素宏模型
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4. Multiple-valued logic-in-memory VLSI based on ferroelectriccapacitor storage and charge addition [C] . Kimura H., Hanyu T., Kameyama M. IEE Colloquium on Computer Modelling of Communication Systems, 1994 . 1994

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A pulse-based, parallel-element macromodel for ferroelectriccapacitors

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