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首页> 外文期刊>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems >Formal verification of digital systems by automatic reduction of data paths
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Formal verification of digital systems by automatic reduction of data paths

机译:通过自动减少数据路径来正式验证数字系统

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摘要

Verification of properties (tasks) on a system P containing data paths may require too many resources (memory space and/or computation time) because such systems have very large and deep state spaces. As pointed out by Kurshan, what is needed is a reduced system P' which behaves exactly as P with respect to the properties that must be proved, but more compact than P, so that the verification can be easily performed. The process of finding P' from P is called reduction. P is specified by a network of interacting finite-state machines for data paths and controllers, and tasks are specified by finite-state automate. The verification of a task T on P is performed by the language containment check L(P)/spl sube/L(T), where L(P) is the language generated by P and L(T) is the language accepted by T. It has been shown that, under appropriate conditions, the system P can be reduced to P' and the task T to T' such that L(P')/spl sube/L(T')/spl hArr/L(P)/spl sube/L(T). The direct language containment check L(P)/spl sube/L(T) is no longer needed; it is replaced by L(P')/spl sube/L(T'), which is less expensive. More specifically, for the purpose of simplifying the verification of some properties, the system implementation is abstracted locally with respect to the behavior under observation (i.e., bottom-up reduction), in the context of an integrated top-down design/verification technique. The tasks that one may want to verify can express both safety and fairness constraints. In this paper, we prove that the reduction of some data paths to four-state, nondeterministic finite-state machines, and the redundancy removal performed on the controllers is a homomorphic transformation, so that the simplified language containment check can automatically be applied without testing the validity of the homomorphism. This homomorphism correctness verification, required when a formal proof is not available, can be executed using a tool like Cospan, but it may not be completed when the state space to be traversed is too large and deep. The redundancy removal performed on the controllers is important because it eliminates the spurious behaviors introduced in the system by the nondeterminism of the reduced data paths. Redundancy, in fact, may induce a failure in the verification of L(P')/spl sube/L(T'), while L(P)/spl sube/L(T) actually holds. In order to show the effectiveness of the proposed methodology, we verify properties on an extended version of the Mead-Conway Traffic Light Controller, on a modified IRQ communication protocol, and on a relatively prime integers checker and generator.
机译:验证包含数据路径的系统P上的属性(任务)可能需要太多的资源(内存空间和/或计算时间),因为此类系统具有非常大和较深的状态空间。正如Kurshan指出的那样,所需要的是一个简化的系统P',它相对于必须被证明的特性表现得与P完全相同,但是比P更紧凑,因此可以轻松地进行验证。从P中找到P'的过程称为还原。 P由用于数据路径和控制器的交互有限状态机网络指定,而任务由有限状态自动化指定。 P上的任务T的验证由语言包含检查L(P)/ spl sube / L(T)执行,其中L(P)是P生成的语言,L(T)是T接受的语言已经表明,在适当的条件下,系统P可以简化为P',任务T可以简化为T',使得L(P')/ spl sube / L(T')/ spl hArr / L(P )/ spl sube / L(T)。不再需要直接语言包含检查L(P)/ spl sube / L(T);它被便宜的L(P')/ spl sube / L(T')代替。更具体地说,为了简化对某些特性的验证,在集成的自上而下的设计/验证技术的背景下,相对于观察下的行为(即,自下而上的减少)本地抽象了系统实现。人们可能想要验证的任务可以表达安全性和公平性约束。在本文中,我们证明了将某些数据路径简化为四态,不确定性有限状态机,以及在控制器上执行的冗余去除是同态变换,因此无需测试即可自动应用简化的语言包含检查同态的有效性。可以使用像Cospan这样的工具执行在没有形式证明时所需的同构正确性验证,但是当要遍历的状态空间太大或太深时,可能无法完成。在控制器上执行的冗余删除非常重要,因为它可以消除由于减少的数据路径的不确定性而在系统中引入的虚假行为。实际上,冗余实际上可能导致L(P')/ spl sube / L(T')验证失败,而L(P)/ spl sube / L(T)实际上成立。为了显示所提出方法的有效性,我们在Mead-Conway交通灯控制器的扩展版本,修改的IRQ通信协议以及相对素数整数检查器和生成器上验证属性。

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