...
首页> 外文期刊>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems >Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets
【24h】

Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets

机译:基于矩敏感度的导线尺寸调整,可减少片上时钟网络的偏斜

获取原文
获取原文并翻译 | 示例
   

获取外文期刊封面封底 >>

       

摘要

Sensitivity-based methods for wire sizing have been shown to be effective in reducing clock skew in routed nets. However, lack of efficient sensitivity computation techniques and excessive space and time requirements often limit their utility for large clock nets. Furthermore, most skew reduction approaches work in terms of the Elmore delay model and, therefore, fail to balance the signal slopes at the clocked elements. In this paper, we extend the sensitivity-based techniques to balance the delays and signal-slopes by matching several moments instead of just the Elmore delay. As sensitivity computation is crucial to our approach, we present a new path-tracing algorithm to compute moment sensitivities for RC trees. Finally, to improve the runtime statistics of sensitivity-based methods, we also present heuristics to allow for efficient handling of large nets by reducing the size of the sensitivity matrix.
机译:事实证明,基于灵敏度的导线定径方法可有效减少布线网中的时钟偏斜。但是,缺乏有效的灵敏度计算技术以及过多的空间和时间要求通常会限制其在大型时钟网络中的效用。此外,大多数偏斜减小方法都根据Elmore延迟模型工作,因此无法平衡时钟单元的信号斜率。在本文中,我们扩展了基于灵敏度的技术,通过匹配多个时刻而不只是Elmore延迟来平衡延迟和信号斜率。由于灵敏度计算对我们的方法至关重要,因此我们提出了一种新的路径跟踪算法来计算RC树的弯矩灵敏度。最后,为了改善基于灵敏度的方法的运行时统计信息,我们还提出了启发式方法,以通过减小灵敏度矩阵的大小来有效处理大型网络。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号