High-performance CORDIC-based orthogonal recursive and adaptive filtering (Recursive filters, Orthogonal filters).

摘要

Recursive or infinite impulse response (IIR) and adaptive filters are important building blocks in digital signal processing (DSP) systems. CORDIC (COordinate Rotation DIgital Computer) or Givens rotation based recursive and adaptive filtering algorithms exhibit good numerical properties which are ideal for VLSI implementations. This thesis presents various techniques for design pipelined and parallel CORDIC based recursive and adaptive filtering algorithms which can be either used for high-speed applications or operated with lower supply voltage to achieve low-power consumptions.; For recursive or IIR digital filters, various pipelined topologies are obtained for the cascaded orthogonal IIR digital filters. For coarse-grain pipelined topology, retiming and orthogonal matrix decomposition techniques are proposed to reduce the filter critical path computation time to a constant, independent of the filter order. For fine-grain pipelined topology, constrained filter design and polyphased decomposition techniques are proposed to achieve arbitrarily high sample rate with linear increased hardware complexity. State-space based fine-grain pipelined true orthogonal IIR digital filter synthesis algorithm is also proposed using the orthogonal embedding and matrix look-ahead techniques.; For adaptive filters, a novel annihilation-reordering look-ahead technique is proposed to obtain fine-grain pipelined QR decomposition based recursive least square (QRD-RLS) adaptive filters. The pipelined algorithms can achieve arbitrarily high sample rates with linear increased hardware complexity. The proposed technique has also been successfully applied to adaptive inverse QR algorithm, QR decomposition based minimum variance distortionless response (MVDR-QR) beamforming algorithm, and QR decomposition based least squares lattice (QRD-LSL) and multi-channel least squares lattice algorithms.; Singular value decompositions (SVD) have become standard linear algebra tools in modern digital signal processing. In this research, parallel SVD architectures are obtained using the retiming and matrix multiplication associativity property to achieve $O1$ parallelism with the critical path consist of 8 Givens rotations and is independent of the matrix size.; Finally, low complexity design techniques using fast orthonormal micro-rotations are introduced for the pipelined CORDIC based topologies.