Dynamically biased filters with high linearity.

摘要

This dissertation investigates filter biasing techniques to give channel-select filters high linearity with very little DC power dissipation in wireless receivers. In order to achieve a high linearity, these techniques reduce the 3rd-order intermodulation components caused by out-of-channel blockers and implement blocker-handling techniques suitable for channel filters in direct-conversion receivers. The improved filter linearities are demonstrated with measurements on prototype chips.; The thesis presents a simple blocker-protection scheme that significantly improves MOSFET-C filters' out-of-channel linearity. Using linear voltage-to-current conversion at the input, the filter linearity against the out-of-band blockers is significantly improved while the effect of the absolute variation of resistors is systematically canceled at the output. The gate bias voltage provided for the MOSFET-C filter is set higher than the supply voltage by a charge pump, which absorbs the bulk of the MOSFET resistors' process, voltage, and temperature (PVT) variation while improving the filter's linearity. A 5th-order elliptic filter achieves a +28-dBV out-of-channel IIP3 and -87 dBV of input-referred noise, with 6.2-mW power dissipation from a 2.7-V supply voltage.; A dynamic biasing scheme that reduces the average DC power of channel-select filters is also presented. A blocker detection circuit implemented in the analog domain can achieve an agile biasing operation in the bias control loop, which enables the filter to reject the out-of-channel blockers without disturbing the response to the desired signal when a large blocker appears and the filter bias current increases accordingly. A feedforward frequency compensation technique is implemented so as to improve the stability of the op amps when bias currents are changed. An adaptive IIP3, 5th-order Butterworth low-pass filter is implemented in a 0.18-mum CMOS process with a 1.8-V supply voltage. The filter quiescent current is 1.2 mA, with a -5-dBV out-of-channel IIP3. The current increases to 2.7 mA, with the IIP3 of +20 dBV, at the blocker level of -13 dBV.; The techniques presented are mainly useful for the design of baseband channel filters, where large out-of-channel blockers determine the required linearity.