首页> 外文会议>Progress in electromagnetics research symposium;PIERS 2010 Xi'an >Model and Performance Analysis of Coplanar Waveguide Based on Different Oxide Structure HR-Si Substrate
【24h】

Model and Performance Analysis of Coplanar Waveguide Based on Different Oxide Structure HR-Si Substrate

机译:基于不同氧化物结构的HR-Si衬底共面波导的模型和性能分析

获取原文

摘要

Coplanar waveguides (CPW) are widely used in MMICs as interconnects and matching networks. Through conventional CMOS processing, three kinds of 50 Ω CPWs are designed and fabricated on three different types of substrates, including HR-Si (High-Resistivity Silicon) directly, HR-Si with continuous SiO_2 layer and HR-Si with discontinuous SiO_2 layer where the SiO_2 between signal and ground line is etched. Measurement shows that CPW on HR-Si owes the least transmission loss while the one on HR-Si with continuous SiO_2 owes the most loss. The insertion losses at 20 GHz are-0.88dB,-2.50dB and-1.06dB respectively. Based on the two-port network analysis of the equivalent model of the substrates, it has been proved that the major factors influencing the transmission loss are resistivity of substrate, oxide capacitance and coupling capacitance. With this conclusion, the theoretical analysis is consistent with the measured results.
机译:共面波导(CPW)在MMIC中广泛用作互连和匹配网络。通过常规的CMOS处理,在三种不同类型的基板上设计和制造了三种50ΩCPW,分别是HR-Si(高电阻率硅),具有连续SiO_2层的HR-Si和具有不连续SiO_2层的HR-Si,其中蚀刻信号线和地线之间的SiO_2。测量表明,HR-Si上的CPW传输损耗最小,而连续SiO_2的HR-Si上的CPW损耗最大。 20 GHz时的插入损耗分别为-0.88dB,-2.50dB和-1.06dB。在对基板等效模型进行两端口网络分析的基础上,已经证明影响传输损耗的主要因素是基板的电阻率,氧化物电容和耦合电容。有了这个结论,理论分析与实测结果是一致的。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号