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Design and performance analysis of buffers: a constructive approach

机译:缓冲区的设计和性能分析:一种建设性的方法

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This paper presents a theoretical framework to analyse the correctness of VLSI programs for buffers and to compare the performance of the corresponding circuits. A very simple calculus consisting of only two operators is presented that suffices to establish the functional correctness of complicated buffer designs. Furthermore, sequence functions are presented both as a formalism to show absence of deadlock and as a vehicle for performance analysis. It is shown that the class of square FIFOs is optimal in the sense that no buffer of the same capacity and I/O-distance can accommodate a larger range of occupancies, when run at its minimum cycle time. Moreover, the theory accurately predicts the size of the range of occupancies that has been found experimentally.
机译:本文提供了一个理论框架,用于分析用于缓冲区的VLSI程序的正确性,并比较相应电路的性能。提出了一个仅由两个运算符组成的非常简单的演算,足以确定复杂缓冲区设计的功能正确性。此外,序列函数既可以表示形式,以显示没有死锁,也可以作为性能分析的工具。结果表明,在以最小循环时间运行时,相同容量和I / O距离的缓冲区无法容纳更大的占用范围,因此,正方形FIFO的类别是最佳的。而且,该理论准确地预测了通过实验发现的占用范围的大小。

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