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AVGS-Mux style: A novel technology and device independent technique for reducing power and compensating process variations in FPGA fabrics

机译:AVGS-Mux风格:一种新颖的技术和与设备无关的技术,可降低功耗并补偿FPGA架构中的工艺差异

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This work presents Adaptive Vgs Multiplexer (AVGS-Mux) Technique. Proposed method controls the transistor current by the source voltage. It can provide ±1.6X control on the delay and ±7X exponential control on sub-threshold and gate leakages in the switch-box, LUT, and interconnects. For equal leakage, it improves the speed 9%, reduces dynamic power 13%, and reduces random dopant fluctuations effect. AVGS-Mux is a good replacement of adaptive body biasing and adaptive supply voltage techniques in emerging Multi-Gate devices which have very small body effect and cannot tolerate voltages higher than nominal VDD due to reliability issues.
机译:这项工作介绍了自适应Vgs多路复用器(AVGS-Mux)技术。提出的方法通过源极电压控制晶体管电流。它可以对开关盒,LUT和互连中的亚阈值和栅极泄漏提供ƒ±1.6X的延迟控制和ñ±7X的指数控制。对于相等的泄漏,它可以将速度提高9%,将动态功率降低13%,并减少随机掺杂物波动的影响。在新兴的Multi-Gate器件中,AVGS-Mux很好地替代了自适应体偏置和自适应电源电压技术,这些器件的体效应很小,并且由于可靠性问题而无法承受高于标称VDD的电压。

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