Post CMP Cleaning for STI Ceria Slurries

摘要

CMP is an established semiconductor process step in the integrated production of logic and memory devices on silicon wafers. A typical fab consumes 240 million gallons of water for both BEOL and FEOL processes (～1500 gals/200 mm wafer). There is the critical need to eliminate particle and metal ion contamination while attempting to reduce water usage levels. The STI (Shallow Trench Insulation) polishing process involves planarizing CVD silicon oxide films as part of the gate oxide structure. Both silica and ceria-type slurries have been used for this process. Certain new ceria slurries appear to achieve STI pattern planarization with minimal oxide erosion. Pourbaix diagrams for cerium oxide, between pH 2 to 7 indicate that Ce+3 and +4 are in equilibrium with the solid abrasive. There has been some concern that ceria ions (as well as other metal ions) will be absorbed onto the very sensitive STI structure. It is critical that an aggressive post CMP cleaning process be developed to remove trace metal and particulate contamination. This paper will discuss initial unoptimized results for the effect of hydrogen peroxide and buffer chelating solutions (BCS) used with single wafer post CMP cleaning equipment with either megansonic or brush or a combination of both to reduce metal and ceria particle contamination.