CODEC
CODEC的相关文献在1990年到2022年内共计140篇,主要集中在无线电电子学、电信技术、自动化技术、计算机技术、一般工业技术
等领域,其中期刊论文122篇、会议论文1篇、专利文献17篇;相关期刊77种,包括中国传媒大学学报(自然科学版)、世界广播电视、电子与电脑等;
相关会议1种,包括全国天气预报电视会商及电视会议系统第一届技术交流会等;CODEC的相关文献由139位作者贡献,包括张彬、邓勇军、王坚等。
CODEC
-研究学者
- 张彬
- 邓勇军
- 王坚
- Kevin
- Russell
- 卢荣富
- 史玉柱
- 吕骏华
- 周继续
- 宫丽华
- 弗拉迪米尔·切佩尔科维奇
- 张静
- 斯蒂芬·F·布朗
- 朱旭巨
- 李桓
- 李玉柏
- 杜尚·米尔科维奇
- 萨沙·帕夫洛维奇
- 赖志豪
- 陈哲
- 陈海永
- 马尔万·A·贾布里
- Chongling Rao
- Cott.AD
- Dihu Chen
- HUANG Yong fengZHANG Jiang ling National Storage System Lab School of Computer Huazhong University of Science Technology Wuhan 430074China
- IDT公司
- J.B.Fowler
- JON.E.NATING
- Jeffrey Fan
- Sheng Yang
- Shenghui Zhao
- Xinwei Niu
- 严菊明
- 付峰
- 代富贵
- 仲跻来
- 倪兰
- 关康信
- 刘军
- 刘家胜
- 刘平华
- 刘泽申
- 刘润生
- 刘福良
- 卞新高
- 卢结成
- 台风
- 史小宏
- 史毅龙
-
-
-
-
摘要:
ADI公司的ADAU1787是集成了两个数字信号处理器(DSP)的具有四个输入和两个输出的编译码器(CODEC).ADAU1787具有可编程的FastDSP音频处理引擎,高达768kHz取样速率,双二阶滤波器,限制器,音量控制和混合;ADAU1787还集成了SigmaDSP音频处理核,高达50MIPS性能,低延迟24位ADC和DAC.
-
-
Shenghui Zhao;
Chongling Rao
-
-
摘要:
Aiming at improving rate flexibility of the enhanced voice services (EVS) channel-aware mode for various VoIP applications, two new bit-rate channel-aware modes are proposed in this paper in addition to the existing 13.2 kbit/s mode. Channel-aware mode uses forward error correction by transmitting re-encoded information redundantly for use when the original information is lost or discarded due to late arrival to the receiver. The primary frame bit rate is reduced for the redundant accommodation. A modified quantization scheme is proposed for core encoding regarding the quality degradation. Partial redundant coding is a simplification of that in the existing 13.2 kbit/s channel-aware mode due to the bit constraint. The objective evaluation results of PESQ show that the additional channel-aware modes achieve similar performance in improving the error robustness against missing packets as that of the existing 13.2 kbit/s mode. Multiple bit-rate modes can be dynamically selected in the communication system for more voice services in different bandwidths. On the other hand, optimal allocation based on real-time feedback can adapt to the rapidly-changing network environment as well as possible.
-
-
-
柳萌;
安军社;
史毅龙;
江源源;
姜文奇
-
-
摘要:
针对空间应用中有效载荷对数据高速传输的要求,根据SpaceWire (SpW)协议提出了一种SpaceWire节点控制器的设计方案。使用Verilog可编程语言进行逻辑设计,实现了节点控制器IP,以XC4VSX55 FPGA做原型验证,验证了系统整体设计的可行性。在专用集成芯片龙芯1E300中实现了该知识产权核(Intellectual Property,IP),搭建测试环境,验证了数据传输过程中的同步性和准确性,ASIC实际测试结果表明设计的节点控制器信号传输速率可达200 Mb/s,满足协议规定的功能。
-
-
-
-
肖启洋;
张忠慧;
方元
-
-
摘要:
This paper puts forward an effective way to suppress acoustic feedback based on TI's TMS320C6713 and using frequency shift.It adopts the Codec chip TLV320AIC23 to capture and play back speech signal, which can connect with DSP seamlessly. Then completes real-time implementation on DSP based on simulating and suppressing screaming in Matlab ideally. The result is also evaluated subjectively and objectively. It turns out that it can suppress the interference of the regenerative reverberation, enhance the amplification gain greatly and improve frequency response characteristics and sound articulation obviously.%提出了一种基于TI公司TMS320C6713 DSP和移频法抑制声反馈的有效方法.该方法采用能与之无缝连接的TLV320AIC23 Codec芯片作为语音采集和回放工具,然后基于在Matlab进行仿真达到抑制啸叫相当理想的基础上完成了在DSP上的实时实现.最后,采用主观法和客观法评估了输出语音的质量.结果表明,该方法能有效抑制再生混响干扰,明显提高了扩声增益,且显著改善了频响特性和声音清晰度.
-
-
Xinwei Niu;
Jeffrey Fan
-
-
摘要:
Nowadays, from home monitoring to large airport security, a lot of digital video surveillance systems have been used. Digital surveillance system usually requires streaming video processing abilities. As an advanced video coding method, H.264 is introduced to reduce the large video data dramatically (usually by 70X or more). However, computational overhead occurs when coding and decoding H.264 video. In this paper, a System-on-a-Chip (SoC) based hardware acceleration solution for video codec is proposed, which can also be used for other software applications. The characteristics of the video codec are analyzed by using the profiling tool. The Hadamard function, which is the bottleneck of H.264, is identified not only by execution time but also another two attributes, such as cycle per loop and loop round. The Co-processor approach is applied to accelerate the Hadamard function by transforming it to hardware. Performance improvement, resource costs and energy consumption are compared and analyzed. Experimental results indicate that 76.5% energy deduction and 8.09X speedup can be reached after balancing these three key factors.
-
-