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method and schaltungsanordnung to transfer digital data using ausgewaehlter components within a produktsignals hoeherer right

机译:方法和方法以使用产品信号权属中的ausgewaehlter组件传输数字数据

摘要

1,156,968. Multiplex systems; pulse signalling. INTERNATIONAL BUSINESS MACHINES CORP. 19 Sept., 1967 [7 Oct., 1966], No. 42495/67. Headings H4L and H4R. In a multiplex transmission system of the type described in Specification 1,129,373, in which orthogonal channel signals are formed by multiplying together selected harmonically related sinusoidal signals and selectively gating them to the line for a specific time, some of the channel signals are produced by multiplying together at least three of the harmonically related sinusoidal signals. By appropriate selection of the number and frequency of the component sinusoidal signals orthogonal product waveforms having particular characteristics may be produced, e.g. low bandwidth, flat frequency distribution, smooth transitions at the switching points, or abrupt transitions, the latter being particularly suitable for synchronizing signals. The actual orthogonal signals used may be changed during transmission if desired, e.g. in an adaptive system. Transmitter, Fig. 1. Comprises a coder 101 receiving input data in any form and providing, at its output, samples on a number of lines, the samples being either analogue or digital, simplex, or multiplex. The samples are fed to, and held in, buffer 100 for the duration of each timing period of the transmitter as regulated by timer 103. Timer 103 also synchronizes the production of harmonically related sinusoidal waves in frequency synthesizer 104 from which the waves are fed via matrix 114 to the multipliers M to provide the product waveforms to be fed to the gates G1 to G5, and hence to the summation network 119 and the outgoing channel in accordance with the signals stored in buffer 100. Since the power level may vary in accordance with the number of participating waveforms, the mode of operation, and the coding scheme employed, one product signal is modulated in gate Gp with the power level, as signalled by programmer 105, and the variable gain amplifier 120 is adjusted to maintain the power output constant. Gates GM and GS are utilized to transmit synchronizing signals. Matrix 114 may be some form of cross point switch controlled by controller 121 to vary the product waveforms used from time to time in accordance with a desired programme, or observations on transmission conditions. Receiver, Fig. 2.-Comprises a frequency synthesizer 135, matrix 136 and a multiplier tree similar to that at the transmitter to produce a similar set of product waveforms which are applied to respective multipliers M1 to Mp together with the incoming signal from the receiver 123. The outputs of the multipliers are applied to integrators 128 to 133, which are sampled and reset at the basic timing period of the system in order to recover the coded signals which, fed via buffer 162 to decoder 163 enable the original data to be reproduced. The synchronization may operate in a phase lock loop on the synchronizing channels, and the power level control signal for the receiver a.v.c. is derived from the power level control channel via programmer 164. As in the transmitter the connections of matrix 136 may be changed periodically according to a stored programme or adaptively in accordance with transmission conditions.
机译:1,156,968。多重系统;脉冲信号。国际商用机器公司1967年9月19日[1966年10月7日],编号42495/67。标题H4L和H4R。在规范1,129,373中描述的类型的多路传输系统中,通过将选定的谐波相关正弦信号相乘并在特定时间内选择性地将其选通到线路上来形成正交信道信号,其中一些信道信号是通过相乘而产生的至少三个谐波相关的正弦信号。通过适当地选择分量正弦信号的数量和频率,可以产生具有特定特性的正交乘积波形,例如。低带宽,平坦的频率分布,切换点处的平稳过渡或突变,后者特别适合于同步信号。如果需要,例如在传输期间可以改变所使用的实际正交信号。在自适应系统中。图1的发射机。包括编码器101,其以任何形式接收输入数据并在其输出处提供多条线路上的样本,这些样本可以是模拟或数字,单工或多路复用的。在由定时器103调节的发射机的每个定时周期的时间内,将样本馈送到并保持在缓冲器100中。定时器103还同步频率合成器104中谐波相关正弦波的产生,通过该频率合成器将波馈入矩阵114加到乘法器M,以根据缓冲器100中存储的信号提供要加到门G1至G5,然后加到求和网络119和输出通道的乘积波形。由于功率电平可以根据利用参与波形的数量,工作模式和所采用的编码方案,一个乘积信号以功率电平在门Gp中进行调制,如编程器105所通知的那样,并且可变增益放大器120被调整以保持功率输出不变。门GM和GS用于传输同步信号。矩阵114可以是由控制器121控制的某种形式的交叉点开关,以根据期望的程序或对传输条件的观察来不时改变所使用的乘积波形。接收机,图2。包括频率合成器135,矩阵136和与发射机处相似的乘法器树,以产生相似的乘积波形集,并将其与来自接收机的输入信号一起施加到各个乘法器M1至Mp 123.乘法器的输出提供给积分器128至133,积分器128至133在系统的基本定时周期进行采样和复位,以恢复编码信号,该编码信号通过缓冲区162馈送到解码器163,从而能够对原始数据进行编码。转载。同步可以在同步信道上的锁相环中进行,并且接收机a.v.c的功率电平控制信号也可以在同步信道中进行。从功率电平控制信道通过编程器164导出“信号”。如在发射机中,矩阵136的连接可以根据存储的程序周期性地改变,或者根据传输条件自适应地改变。

著录项

  • 公开/公告号DE000001301359A

    专利类型

  • 公开/公告日1969-08-21

    原文格式PDF

  • 申请/专利权人 IBM;

    申请/专利号DEJ0034734A

  • 发明设计人 JOSEPH FILIPOWSKY RICHARD FRED;

    申请日1967-10-05

  • 分类号

  • 国家 DE

  • 入库时间 2022-08-23 12:23:41

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