Provision of logical circuit for the notification of events or series of events. (Machine-translation by Google Translate, not legally binding)

摘要

Logic circuit arrangement for the notification of events or series of events, in which memory elements are provided, consisting of scale switches insured by and gates, as well as other and gates that control o gates, characterized in that in the circuit of input of each of the memory elements are provided with switches and because a number of additional and gates are provided which have inputs connected to the outputs of the scale switches as large as the number of reduced scale switches in the unit, because, moreover these and the doors y have a number of inputs at most as large as the number of memory elements and because the outputs thereof are connected to different inputs of the gates 0, being provided at the outputs of the doors or amplifiers and in the outputs of the same, indicators. (Machine-translation by Google Translate, not legally binding)