首页> 外国专利> Logical network for stored data failure correction - uses redundant code to correct bit failures in integrated circuit network

Logical network for stored data failure correction - uses redundant code to correct bit failures in integrated circuit network

机译:用于存储数据故障纠正的逻辑网络-使用冗余代码纠正集成电路网络中的位故障

摘要

A logic network for correcting bit failures in stored binary data uses only one decoding network. The information is held in a register in a highly redundant code which is used to detect and correct any errors when the data is read out. A closed loop network with suitable logic properties reconstitutes the data correctly. With a sufficiently redundant code, the information may be corrected even if several bits have become corrupted. A suitable code for this purpose is briefly described, and consists of digital words built up from test characters. A voting system is used so that faulty readings may be rejected.
机译:用于校正存储的二进制数据中的位故障的逻辑网络仅使用一个解码网络。信息以高度冗余的代码保存在寄存器中,该代码用于在读取数据时检测和纠正任何错误。具有适当逻辑特性的闭环网络可以正确地重构数据。使用足够冗余的代码,即使几个位已损坏,也可以纠正信息。简要描述了用于此目的的合适代码,它由测试字符组成的数字单词组成。使用表决系统,以便可以拒绝错误的读数。

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