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Test bit train generating circuit - applies bit trains to shift registers and applies them through delay circuits and amplifier to tested circuit
Test bit train generating circuit - applies bit trains to shift registers and applies them through delay circuits and amplifier to tested circuit
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机译:测试位串生成电路-将位串应用于移位寄存器,并通过延迟电路和放大器将其应用于测试电路
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摘要
The bit train is intended for testing of logic circuits. At least two bit trains can be fed in shift registers (2, 3). They are in cyclical operation switched over, and clock pulses of different frequencies can be applied to them. A delay circuit (4, 5) is connected to the output of each shift register (2, 3). Output signals of the shift registers (2, 3) are synchronously applied to the dealy circuits (4, 5) connected to the tested circuit (1) through amplifiers (12-18).
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