Radar side lobe suppression circuit - has digital integrator between correlator and weighting multiplier in feedback loop

摘要

The circuit has a compensation network with a feedback path incorporating a correlator (K1) and a weighting multiplier (M5), for cancellation of the radar antenna side lobe by the noise received by one or more auxiliary radio antennas. The digital regulating loop is inserted in the video part of the radar appts., with a digital integrator (I1,I2) between the correlator (K1) and the weighting multiplier (M5). Pref. the side lobe suppression circuit has two channels handling orthogonal signal components, each incorporating a digital integrator (I1,I2) with an adder and a store.