Electronic music PAM control circuit - has VCO driven by mixed DC-VLF signal to clock stored analogue values through bucket-type shift register stages

摘要

The circuit uses bucket type shift register (6) whose individual stages store analogue values applied at a terminal (6-5) which are passed on from stage to stage by application of two clock phases at terminals (6-4,6-1). The clock pulse generator (12) is a voltage controlled oscillator responsive to a mixed d.c. and variable very low frequency voltage applied to the phase control input (12-5). Two different phase control input voltages (13,14) may be applied to two channels. The shift register clock frequency may vary between 30 to 110KhZ and the delays produced thereby cover an adequate phase range. The output from the analogue shift registers (5,6) is combined at the common output (23), amplified to loudspeakers. The phase change rhythm for one channel may for example be 1-2 Hz, whereas the rhythm for the other channel may be 7-10 Hz. A third channel may be provided which contains slowly changing d.c. level changes to control the average phase delay, or the changes may be applied to the channels on an individual basis.