Logical detection circuit for a synchronous data transmission system with ternary symbols and to verify intersymbol interference of the partial response type class 1 n=2

摘要

the detection logic retrieves the value of a symbol ternary 0, t 1, converted into a signal at five levels (0, + 1, + 2, by a transmission type partial response class 1 (n = 2).designed by binary logic circuits is used in the result of a comparator at four stages (1) issuing the reception level value of the four binary signals by means of two thresholds is exceeded through positive and positive and far exceeded born extreme negative and negative threshold values and issues through symbols detected in ternarythe form of two binary components available on the output (t + t), storage, the duration of a symbol to scale (104, 105), and generated both through combinatorial logic circuits using logic gates of a similar type "and" and "or" (108, 109. 110 - 111, 112 113).