METHOD OF FORMING INTEGRATED CIRCUIT HAVING P-N-P AND N-P-N TRANSISTORS HAVING CURRENT FLOWS ISOLATED FROM EACH OTHER AND PERPENDICULAR TO EACH OTHER ON SUBSTRATE MADE OF N-TYPE SEMICONDUCTOR MATERIAL

摘要

PURPOSE: To ensure excellent dynamic characteristics without limiting the maximum working voltage by decreasing the collector series resistance of PNP and NPN transistors and attaining a substantially constant low concentration collector thickness. CONSTITUTION: Two P+ type regions 2, 3 for forming a horizontal isolation region of an NPN transistor and a low resistivity collector region of a PNP transistor are formed conventionally on an N type single crystal silicon substrate 1. An N+ region 4 serving as a low resistivity collector region of an NPN transistor is then formed in the region 2 followed by growth of an N type epitaxial layer 5. Subsequently, P+ type regions 6, 7, 8 and 9 are diffused until these regions touch the regions 2, 3. The regions 2, 6 and 7 are combined together and then the base and emitter regions of the NPN transistor surround an N type region 10 being diffused therein completely and the regions 3, 8 and 9 serve together as the collector region of the PNP transistor. A P type region 12 is diffused in an N type region 11 and serve the lightly doped collector region of the PNP transistor.