CONVERTER OF CODES WITH IRRATIONAL POSITIVE BASE TO CODES WITH IRRATIONAL NEGATIVE BASE

摘要

the invention u043eu0442u043du043eu0441u0438u0442u0441u00a0 to computer technology. the purpose of u0438u0437u043eu0431u0440u0435u0442u0435u043du0438u00a0 increase u0431u044bu0441u0442u0440u043eu0434u0435u0439u0441u0442u0432u0438u00a0 u043fu0440u0435u043eu0431u0440u0430u0437u043eu0432u0430u0442u0435u043bu00a0 by u0443u043cu0435u043du044cu0448u0435u043du0438u00a0 number of bars u0441u0443u043cu043cu0438u0440u043eu0432u0430u043du0438u00a0. the converter includes a register 5, which u0445u0440u0430u043du00a0u0442u0441u00a0 u0440u0430u0437u0440u00a0u0434u044b input code number, the corresponding negative u0432u0435u0441u0430u043c exit code;u0441u0434u0432u0438u0433u043eu0432u044bu0439 register 6, in which the contents of the register 5 and u0437u0430u043fu0438u0441u044bu0432u0430u0435u0442u0441u00a0 u043fu0440u043eu0438u0437u0432u043eu0434u0438u0442u0441u00a0 shift one u0440u0430u0437u0440u00a0u0434 right;block 8 u043fu0440u0438u0432u0435u0434u0435u043du0438u00a0 fibonacci codes with minimum form to maximize the form code combinations, u0441u043eu0434u0435u0440u0436u0430u0449u0435u0439u0441u00a0 in the register 5. unit 7 part implements the operation prohibition u0433u0430u0448u0435u043du0438u00a0 units.the switchboard 2 team block 9 is connected to the entrance of the synchronization register 5 exits the block 7 of the ban, the block 8 u043fu0440u0438u0432u0435u0434u0435u043du0438u00a0 fibonacci codes to m u0438u043du0438u043cu0430u043bu044cu043du043eu0439 form and the entrance 1. the register 3 and u0444u0438u0431u043eu043du0430u0447u0447u0438u0435u0432u044bu0439 adder 4 form the output code. 3 u0438u043b., 2 table.