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CMI ENCODING CIRCUIT WITH CODE RULE ILLEGALITY

机译:具有代码规则违规性的CMI编码电路

摘要

PURPOSE:To securely suppress the occurrence of a glitch by inputting the output signal of a CMI code to a decision circuit and comparing it with a data signal, etc., to be inputted next, and inputting a clock signal to a final-stage output inverting circuit only when it is necessary and inverting the output. CONSTITUTION:A decision circuit 1.6 compares a level which is outputted as a CMI code currently with an input data signal (NRZ code signal) from a latch delay circuit 1.4, an input CRV signal (code rule illegality signal of NRZ signal) from a latch circuit 1.5, and a level which are held by a data '1' level storage circuit 1.7, and outputs the next data signal and CRV signal after CMI encoding. In this case, when the level which is outputted currently needs to be inverted, one of gate circuits 1.8-1.10 is opened to output the clock signal to the output inverting circuit 1.11. The output inverting circuit 1.11 inverts the output at rises of clock signals from three input signal lines and outputs it as the signal of the CMI code.
机译:目的:通过将CMI代码的输出信号输入到判定电路并将其与接下来要输入的数据信号等进行比较,并将时钟信号输入到最终输出,以安全地抑制毛刺的发生仅在必要时对电路进行反相,然后对输出进行反相。组成:判决电路1.6将当前作为CMI代码输出的电平与来自锁存延迟电路1.4的输入数据信号(NRZ代码信号),来自锁存器的输入CRV信号(NRZ信号的代码规则非法信号)进行比较电路1.5和由数据“ 1”电平存储电路1.7保持的电平,并在CMI编码后输出下一个数据信号和CRV信号。在这种情况下,当当前需要输出的电平需要反相时,门电路1.8-1.10之一断开以将时钟信号输出到输出反相电路1.11。输出反相电路1.11在来自三个输入信号线的时钟信号的上升沿对输出进行反相,并将其作为CMI代码的信号输出。

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