首页> 外国专利> HYBRID TIME MULTIPLEX SWITCHING SYSTEM WITH OPTIMALLY DESIGNED BUFFER STORAGE.

HYBRID TIME MULTIPLEX SWITCHING SYSTEM WITH OPTIMALLY DESIGNED BUFFER STORAGE.

机译:具有优化设计的缓冲存储的混合时间多路切换系统。

摘要

A switching system for switching synchronous and/or synchronous data blocks between incoming and outgoing multiplexes. The asynchronous blocks are sporadically carried in the multiplexes. The cost of the system is reduced owing to the use of a single buffer memory whose cells memorize indifferently synchronous and asynchronous blocks. The number of cells is lower than the product of the number of incoming or outgoing multiplexes and the number of blocks per frame in the multiplexes. A buffer memory managing and write addressing circuit derives and memorizes the occupied or free condition of each of the buffer memory cells thereby permanently selecting the address of one of free buffer cells in which a data block is to be written. The occupied condition of a cell is signalled responsive to the write of an incoming data block into this cell, and the free condition of the cell is signalled responsive to the last read of the written block. A written block may be read several times when it should be transmitted onto several addressee outgoing multiplexes.
机译:一种用于在输入和输出多路复用之间切换同步和/或同步数据块的切换系统。异步块偶尔在多路传输中传送。由于使用了单个缓冲存储器,其单元存储了无关紧要的同步和异步块,因此降低了系统成本。信元数低于输入或输出多路复用数与多路复用中每帧的块数之积。缓冲存储器管理和写寻址电路导出并存储每个缓冲存储器单元的占用或空闲状态,从而永久地选择要在其中写入数据块的空闲缓冲单元之一的地址。响应于将进入的数据块写入该单元而用信号通知单元的占用状态,并且响应于所写入的块的最后读取来通知单元的空闲状态。当应该将一个已写入的块发送到多个收件人的输出多路复用时,可能会读取几次。

著录项

  • 公开/公告号AT81240T

    专利类型

  • 公开/公告日1992-10-15

    原文格式PDF

  • 申请/专利权人 FRANCE TELECOM;

    申请/专利号AT19880401797T

  • 发明设计人 SERVEL MICHEL;GONET PATRICK;FRANCOIS JOEL;

    申请日1988-07-08

  • 分类号H04L12/54;

  • 国家 AT

  • 入库时间 2022-08-22 05:33:05

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