Serial data circuit with randomly-accessed registers of different bit length

摘要

An integrated circuit with a serial data port includes a counter for counting clock pulses and generating a binary signal, a decoder for converting the binary signal to a load signal to access an appropriately sized register, a serial-in, parallel-out shift register for receiving serial data and outputting the data in parallel, and a plurality of registers. The registers receive the load signal from the decoder and have a multi-bit data input for receiving the parallel data from the shift register. The circuit can access an appropriately sized register by using the counter and the decoder instead of address bits, and therefore reduce the total bit stream length. The circuit can randomly select any register out of several registers having different bit lengths.