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SIMPLE DECODING METHOD FOR CONVOLUTION CODE AND SIMPLE DECODING CIRCUIT

机译:卷积码的简单译码方法和电路的简单译码

摘要

PURPOSE: To implement simple decoding for a convolution code with a desired bind length and a coding rate n/m. ;CONSTITUTION: Convolution code data for each of m(=4) bits fed to a decoding circuit are given respectively to m-sets of shift registers SR1-SR4 by one bit each having shift stages of x=[(K-1)/(m-n)] in series connection, where [p] is a minimum integer over a real number (p). The combination of n(=3) sets of mod2 adders (231-234) is specified by all shift stages (#1-#24) and n-sets of decoding generating vectors specifying n-sets of decoding generation polynomials and each mod 2 adder applies mod2 addition to outputs of the combined shift stages and n-sets of addition results are outputted as decoding result in n-bits. n-sets of decoding generating vectors have n-rows of consecutive elements selected from N-rows of decoding generating vectors obtained from an inverse matrix of a square matrix using N×N sets of coefficients specifying N-mx(=24) sets of convolution code generation polynomials as elements as coefficients respectively.;COPYRIGHT: (C)1993,JPO&Japio
机译:目的:对具有所需绑定长度和编码率n / m的卷积码执行简单解码。 ;组成:馈给解码电路的m(= 4)位中每一个的卷积码数据分别由m个移位寄存器SR 1 -SR 4 组成。每一位具有串联的移位级,每个移位级为x = [(K-1)/(mn)],其中[p]是实数(p)上的最小整数。 n(= 3)个mod2加法器集(23 1 -23 4 )的组合由所有移位阶段(#1-#24)和n个集合指定指定n个解码生成多项式的解码生成矢量的集合,并且每个mod 2加法器将mod2相加应用于组合的移位级的输出,并且n个相加结果的输出作为n位的解码结果被输出。使用指定N-mx(= 24)个卷积的系数的N×N个系数集,从平方矩阵的逆矩阵中获得的n行解码生成向量中选择n行解码生成矢量的n行连续元素代码生成多项式分别作为元素作为系数。;版权:(C)1993,JPO&Japio

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