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Integrator and active filter including integrator with simple phase compensation

机译:积分器和有源滤波器,包括具有简单相位补偿的积分器

摘要

In an integrator circuit (100) having a wide linearity range, there are provided: a first emitter-coupled transistor pair (10) having two bipolar transistors (Q₃: Q₄), emitter areas of the transistors (Q₃: Q₄) being substantially equal to each other; a second emitter-coupled transistor pair (20) having two bipolar transistors (Q₅: Q₆), emitter areas of said transistors (Q₅: Q₆) being substantially equal to each other; first and second input terminals (8: 9) for receiving an input voltage (VIN) respectively; a first output terminal (OUT1) to which a first collector (1) of the first emitter-coupled pair (10) and also a first collector (2) of the second emitter-coupled transistor pair (20) are commonly connected; a second output terminal (OUT2) to which a second collector (3) of the first emitter-coupled transistor pair (10) and also a second collector (4) of the second emitter-coupled transistor pair (20) are commonly connected; first DC-voltage applying means (16: 17) connected to the first input terminal (8), for applying a first offset DC (direct current) voltage having a predetermined level between a first base electrode (11) of the first emitter-coupled transistor pair (10) and a first base electrode (12) of the second emitter-coupled transistor pair (20); second DC-voltage applying means (18: 19) connected to the second input terminal (9), for applying a second offset DC voltage having the same level but an opposite polarity to that of the first offset DC voltage between a second base electrode (14) of the first emitter-coupled transistor pair (10) and a second base electrode (13) of the second emitter-coupled transistor pair (20); and, capacitance means (7) connected between the first and second output terminals (OUT₁: OUT₂).
机译:在具有宽线性范围的积分器电路(100)中,提供:具有两个双极型晶体管(Q 1:Q 4)的第一发射极耦合晶体管对(10),晶体管(Q 1:Q 3)的发射极面积基本相等。对彼此;第二发射极耦合晶体管对(20),它具有两个双极型晶体管(Q 1:Q 3),所述晶体管(Q 1:Q 3)的发射极面积基本相等;第一和第二输入端子(8:9)分别用于接收输入电压(VIN);第一输出端(OUT1),第一发射极耦合对(10)的第一集电极(1)和第二发射极耦合晶体管对(20)的第一集电极(2)共同连接到第一输出端(OUT1);第一发射极耦合晶体管对(10)的第二集电极(3)和第二发射极耦合晶体管对(20)的第二集电极(4)共同连接到第二输出端子(OUT2);第一直流电压施加装置(16:17),其连接到第一输入端子(8),用于在第一发射极耦合的第一基极(11)之间施加具有预定电平的第一偏置直流(直流)电压晶体管对(10)和第二发射极耦合的晶体管对(20)的第一基极(12);与第二输入端子(9)连接的第二直流电压施加装置(18:19),用于在第二基极(第二电极)之间施加与第一偏置直流电压具有相同电平但极性相反的第二偏置直流电压。第一发射极耦合晶体管对(10)的第一基极(13)和第二发射极耦合晶体管对(20)的第二基极(13);电容装置(7)连接在第一和第二输出端(OUT 1:OUT 2)之间。

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