Switching element null for the intersection contact in the digital binary digit string which is multiplexed by time sharing multiplexes the digital binary digit string of the bit speed which differs

摘要

PURPOSE: To provide reset signals from column synchronization signals by providing the read means of a memory at an address decided by a distribution rule synchronized with an insertion timing speed. CONSTITUTION: In the case that the counter of the address generator selected by a selection circuit 14 is a multiplexed structure US attaching to a counter assembly 5, for clock signals CK used for increasing the counters, by blocking all the column synchronization signals of a reconstructed frame excluding the columns 10 and 14 of lines 0-8, the column synchronization signals of the reconstructed frame are obtained.